Computer Organization and Architecture

Instructor

Dr. Janibul Bashir

Course Overview

In this course, we'll study about the architecture and organization of computer systems. We will study about the basic processor designing, pipelining and memory systems.

Course Code

ITT303

Lectures

Mon, Wed, Thur, Fri 

(12:00 PM - 01:00 PM)

Reference Material for the course

Text Book (TB): Computer Organisation and Architecture By Smruti Ranjan Sarangi

Reference (R1): Computer Organisation and Embedded Systems By Carl Hamachar et al.

Reference (R2): Computer Organisation and Design By Patterson et al.

Video Lectures: Computer Organisation and Architecture

Announcements:

Course Content

Computer Organization and Architecture: The science and art of designing, selecting, and interconnecting hardware components and designing the hardware/software interface to create a computing system that meets functional, performance, energy consumption, cost, and other specific goals.

Introduction to Computer Architecture (TB-Chapter 1, 3, R2-Chapter 1,2) 

(03-08-2022) -- [Lecture 1] Course Introduction and Course Structure -  [Video Lecture]

(04-08-2022) -- [Lecture 2] Levels of Transformation, Cross Compilation[Video Lecture]

[Asssignment 1] - Due Date 15 August 

(05-08-2022) -- [Lecture 3]  What is Architecture and Organization? Computing models: Von Neumann model, Register Based, Registers  -  [Video Lecture]

H/W: Learn about the express Memory

Summarize the paper "Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems"

(08-08-2022) -- [Lecture 4]  Control FLow and DataFlow Models, Memory Organization, Load-store and Memory-Memory architectures  -  [Video Lecture]

(10-08-2022) -- [Lecture 5]  Instruction set Architecture and its components. Microarchitecture and its components  -  [Video Lecture]

(11-08-2022) -- [Lecture 6]  Addressing modes: Register/Memory direct and indirect modes, AutoIncrement, Autodecrement, Immediate, PC relative, and base-index offset  -  [Video Lecture]

Language of Bits and Computer Arithmetic (TB-Chapter 2, 3, R-Chapter 1, 9)

(12-08-2022) -- [Lecture 7] Representation of Numbers in Decimal, Octal, Hexadecimal and Binary, signed binary number representation, Floating Point Numbers[Video Lecture1] [Video Lecture2][Video Lecture3]

(17-08-2022) -- [Lecture 8] Computer Arithmetic: Binary Addition and Subtraction, Ripple carry adder, Carry Lookahead adder - [Video Lecture]

H/W: Derive the complexity of CSA and CLA.

(18-08-2022) -- [Lecture 9] Computer Arithmetic: Multiplication of Binary Numbers, Iterative Algorithm, Booths Algorithm - [Video Lecture]

(22-08-2022) --  [Lecture 10] Computer Arithmetic: Binary Division, Restoring Division Algorithm, Non-Restoring Division Algorithm [Video Lecture]

[ASSISGNMENT 2] Design the circuits for the addition, multiplication and division using logism or using any HDL.

(24-08-2022) --  [Lecture 11] Arithmetic operations for floating-point numbers, Truncation: Chopping, Von Neumann Rounding, and rounding - [Video Lecture]

RISC-V ISA and compilation flow (Reference: RISC-V online documentation) 

(25-08-2022) -- [Lecture 12] Introduction to RISC V ISA and Base Integer Version[Video Lecture]

(25-08-2022) -- [Lecture 13] RV32I Instructions: R/I/S Format instructions -  [Video Lecture1][Video Lecture2]

(26-08-2022) -- [Lecture 14] RV32I instructions: U/SB/UJ Format instructions, RISCV assembly programs -  [Video Lecture1][Video Lecture2]

(29-08-2022) --  [Lecture 15] Compilation Flow: Compiler, Assembler, Linker and Loader [Video Lecture]

[ASSISGNMENT 3] Design an assembler for RV32I programs.

Digital logic: Gates, Registers, and Memories (Reference: TB1 Chapter 6) 

(30-08-2022) -- [Lecture 16] Digital Logic: Switching Networks, NMOS and PMOS Transistors, Logic Gates, Combinational Circuits  -  [Video Lecture]

(01-09-2022) -- [Lecture 17] Digital Logic: Combinational Logic, Sequential Logic, Registers, SRAM memories - [Video Lecture]

(05-09-2022) -- [Lecture 18] Digital Logic: SRAM Arrays, DRAM Memory, Refresh Logic, ROM, PROM - [Video Lecture]

Processor Designing (TB-Chapter 8, R-Chapter 5) 

(12-09-2022) -- [Lecture 19]  -- Processor Design: RISC V  DataPath, Control Path, Fetch Stage, and Decode Stage  - [Video Lecture]

(14-09-2022) -- [Lecture 20] -- Processor Design: Decode, Execute, Memory Access, and Register Write-back Stage - [Video Lecture]

(16-09-2022) -- [Lecture 21] -- Processor Design: Design of Control Path, Hardwired and Microprogrammed Control, Horizontal and Vertical Microprogramming - [Video Lecture]

Processor Pipelining (TB-Chapter 9, R-Chapter 6)

(19-09-2022) -- [Lecture 22] -- Single-Cycle and Multi-Cycle Processors, Thermal Breakdown, Performance Equation - [Video Lecture]

(21-09-2022) -- [Lecture 23] -- Processor Pipelining: Uniform Pipeline, Ideal Pipeline, Pipeline Diagram, 5-stage pipeline - [Video Lecture]

(05-10-2022) -- [Lecture 24] -- Pipeline Hazards: Data Hazard, Control Hazard, and Structural Hazard - [Video Lecture]

(06-10-2022) -- [Lecture 25] -- Handling RAW Hazards: Software Solution, Dependency-Check Logic, and Scoreboarding - [Video Lecture]

(07-10-2022) -- [Lecture 26] -- Hardware Solution for handling RAW Dependency - Data Forwarding - [Video Lecture]

(10-10-2022) -- [Lecture 27] -- Handling Control Hazards - Stalling Pipeline, Delayed Branching, Branch Prediction - [Video Lecture]

(12-10-2022) -- [Lecture 28] -- Pipeline Hazards Summary | Precise interrupts | Performance Evaluation - [Video Lecture]

Memory System (TB-Chapter 10)

(13-10-2022) -- [Lecture 29]  -- Memory System: On-chip and Off-chip Memory, Principle of Locality, Need of Caches -  [Video Lecture]

(17-10-2022) -- [Lecture 30]  -- Cache Mapping Techniques: Direct Mapping - [Video Lecture]

(18-10-2022) -- [Lecture 31] -- Cache Mapping Techniques: Fully Associative Mapping, and Set Associative Mapping - [Video Lecture]

(19-10-2022) -- [Lecture 32] -- Cache Operations, Write-back, and Write-Through Cache, Cache Misses: Compulsory, Capacity, and Conflict Misses, Cache Optimisations: Write Buffer, and Early restart - [Video Lecture]

(31-11-2022) -- [Lecture 33]  -- Virtual Memory: Overlap Problem, Size Problem, Virtual Memory Map, Virtual Address, Physical Address, Segmentation - [Virtual Mem] [Segmentation]

(03-11-2022) -- [Lecture 34]  -- Paging, Page-Tables - Single level, multi-level and Inverted, Translation LookAside Buffer - [Paging] 

Multi-Processor Systems (TB-Chapter 11)

(04-11-2022) -- [Lecture 35]  -- Introduction to Multiprocessors, Asymmetric and Symmetric Multiprocessing, Loosely Coupled and Tightly coupled multiprocessors, Multicores - [Multiprocessors] 

(07-11-2022) -- [Lecture 36]  -- Flynn's classification: SISD, SIMD, MISD, MIMD, Multithreading: coarse-grained, fine-grained, and simultaneous multithreading - [Video Lecture] 

(14-11-2022) -- [Lecture 37]  -- MIMD Systems: Coherence and Consistency, Sequentially consistent memory model 

(16-11-2022) -- [Lecture 38]  -- Cache Coherence: Snoopy Protocol and Directory-Based Protocol 

(17-11-2022) -- [Lecture 39]  -- Interconnection Networks: Bisection Bandwidth, Network Diameter, Network Topologies