Embedded Files
Instructor
Instructor
Dr. Janibul Bashir
Course Overview
Course Overview
In this course, we'll study about the architecture and organization of computer systems. We will study about the basic processor designing, pipelining and memory systems.
Course Code
Course Code
ITT303
Lectures
Lectures
Mon, Thur, Fri
Reference Material for the course
Text Book (TB 1): Computer Organisation and Architecture By Smruti Ranjan Sarangi
Text Book (TB 1): Computer Organisation and Architecture By Smruti Ranjan Sarangi
Text Book (TB 2): Digital Design and Computer Architecture By Harris et al.
Text Book (TB 2): Digital Design and Computer Architecture By Harris et al.
Reference (R1): Computer Organisation and Embedded Systems By Carl Hamachar et al.
Reference (R1): Computer Organisation and Embedded Systems By Carl Hamachar et al.
Reference (R2): Computer Organisation and Design By Patterson et al.
Reference (R2): Computer Organisation and Design By Patterson et al.
Video Lectures: Computer Organisation and Architecture
Announcements:
The classes have started from 06-08-2023.
Course Content
Course Content
Computer Organization and Architecture: The science and art of designing, selecting, and interconnecting hardware components and designing the hardware/software interface to create a computing system that meets functional, performance, energy consumption, cost, and other specific goals.
Introduction to Computer Architecture (TB-Chapter 1, 3, R2-Chapter 1,2)
Introduction to Computer Architecture (TB-Chapter 1, 3, R2-Chapter 1,2)
(06-08-2025) -- [Lecture 1] Course Introduction and Course Structure - [Video Lecture]
(06-08-2025) -- [Lecture 2] Levels of Transformation, Cross Compilation - [Video Lecture]
(07-08-2025) -- [Lecture 3] Current research and future directions in computer architecture.
(07-08-2025) -- [Lecture 4] What is Architecture and Organization? Computing models: Von Neumann model, Register Based, Registers, Computer architectures - [Video Lecture]
(08-08-2025) -- [Lecture 5] Instruction set Architecture and its components, Microarchitecture and its components - [Video Lecture]
(12-08-2025) -- [Lecture 6] Addressing modes: Register/Memory direct and indirect modes, AutoIncrement, Autodecrement, Immediate, PC relative, and base-index offset - [Video Lecture]
Digital logic: Gates, Registers, and Memories (Reference: TB1 Chapter 6, TB2 Chapter 1,2,3,5)
Digital logic: Gates, Registers, and Memories (Reference: TB1 Chapter 6, TB2 Chapter 1,2,3,5)
(13-08-2025) -- [Lecture 7] Digital Logic: Switching Networks, NMOS and PMOS Transistors - [Video Lecture]
(14-08-2025) -- [Lecture 8] Combinational Circuits such as Multiplexer, Decoder, Logic using multiplexers - [Video Lecture]
(18-08-2025) -- [Lecture 9] Combinational Circuits: Programmable Logic Array, Tri-State Buffer
(19-08-2025) -- [Lecture 10] Sequential Circuits (SC): Need of SC, SRAM Memory [Video Lecture]
(20-08-2025) -- [Lecture 11] 2.5D memory architecture, DRAM memory [Video Lecture]
(25-08-2025) -- [Lecture 12] Latches, Clock, Flip Flops
RISC-V ISA and compilation flow (Reference: RISC-V online documentation)
RISC-V ISA and compilation flow (Reference: RISC-V online documentation)
(28-08-2025) -- [Lecture 13] Introduction to RISC V ISA and Base Integer Version - [Video Lecture]
(29-08-2025) -- [Lecture 14] RV32I Instructions: R/I Format instructions - [Video Lecture1][Video Lecture2]
(01-09-2025) -- [Lecture 15] RV32I instructions: Load and S Format instructions - [Video Lecture]
(01-09-2025) -- [Lecture 16] RV32I instructions: - SB/UJ format instructions, RISCV assembly programs - [Video Lecture]
Processor Designing (TB-Chapter 8, R-Chapter 5)
Processor Designing (TB-Chapter 8, R-Chapter 5)
(08-09-2025) -- [Lecture 17] -- Processor Design: Von Neumann Model, RISC V DataPath, Control Path, Fetch Stage, and Decode Stage - [Video Lecture]
(09-09-2025) -- [Lecture 18] -- Processor Design: Execute, Memory Access, and Register Write-back Stage - [Video Lecture]
(11-09-2025) -- [Lecture 19] -- Processor Design: Design of Control Path, Hardwired Control Unit
(12-09-2025) -- [Lecture 20] -- Microprogrammed Control, Horizontal and Vertical Microprogramming - [Video Lecture]
(16-09-2025) -- [Lecture 21] -- Single-Cycle and Multi-Cycle Processors, Thermal Breakdown, Performance Equation - [Video Lecture]
Processor Pipelining (TB-Chapter 9, R-Chapter 6)
Processor Pipelining (TB-Chapter 9, R-Chapter 6)
(17-09-2025) -- [Lecture 22] -- Processor Pipelining: Uniform Pipeline, Ideal Pipeline, Pipeline Diagram, 5-stage pipeline - [Video Lecture]
(18-09-2025) -- [Lecture 23] -- Pipeline Hazards: Data Hazard - [Video Lecture]
(22-10-2025) -- [Lecture 24] -- Pipeline Hazards: Control Hazard, and Structural Hazard - [Video Lecture]
(23-10-2025) -- [Lecture 25] -- Handling RAW Hazards: Software Solution, Dependency-Check Logic, and Scoreboarding - [Video Lecture]
(24-10-2025) -- [Lecture 26] -- Handling Control Hazards - Stalling Pipeline, Delayed Branching, Branch Prediction - [Video Lecture]
Processor Pipelining (TB-Chapter 9, R-Chapter 6)
Processor Pipelining (TB-Chapter 9, R-Chapter 6)
(27-10-2025) -- [Lecture 27] -- Introduction to Memories and Memory Interleaving: Channels, Ranks, Banks and Memory Arrays [Video Lecture]
(29-10-2025) -- QUIZ 1
MID TERM EXAMINATION
Language of Bits and Computer Arithmetic (TB-Chapter 2, 3, R-Chapter 1, 9) -- SELF READING
Language of Bits and Computer Arithmetic (TB-Chapter 2, 3, R-Chapter 1, 9) -- SELF READING
(Self Reading 1) -- Representation of Numbers in Decimal, Octal, Hexadecimal and Binary, signed binary number representation, Floating Point Numbers - [Video Lecture1] [Video Lecture2][Video Lecture3]
(Self Reading 2) -- Computer Arithmetic: Binary Addition and Subtraction, Ripple carry adder, Carry Lookahead adder - [Video Lecture]
(Self Reading 3) -- Computer Arithmetic: Multiplication of Binary Numbers, Iterative Algorithm, Booths Algorithm - [Video Lecture]
(Self Reading 4) -- Computer Arithmetic: Binary Division, Restoring Division Algorithm, Non-Restoring Division Algorithm [Video Lecture]
(Self Reading 5) -- Arithmetic operations for floating-point numbers, Truncation: Chopping, Von Neumann Rounding, and rounding - [Video Lecture]
(Self Reading 6) -- Compilation Flow: Compiler, Assembler, Linker and Loader [Video Lecture]
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